The Eleventh Annual IEEE International Application Specific Integrated Circuits (ASIC) Conference was held at the Hyatt Regency Rochester Hotel on September 13 through 16, 1998. The ASIC conference was sponsored by the IEEE Rochester Section and was in cooperation with IEEE Solid State Circuits Council. The conference featured a full day of Workshops followed by a three-day technical program including invited speakers. The workshops were presented at Rochester Institute of Technology (RIT), and the technical program took place at the Hyatt Regency. The conference was also featured in an EE Times report (October 05, 1998, Issue: 1029, Section: News.)

Workshops:

The conference opened with a day of workshops at Rochester Institute of Technology. Registrants were transported by bus from the Hyatt Regency to RIT. Lunch for the attendees was provided by the ASIC'98 Conference. The workshops were selected to provide in-depth coverage of important new topics in ASIC design and modeling that address increasing VLSI complexity and the move toward systems on a chip.

We presented two half-day workshops and three full-day workshops. A half-day workshop titled Formal Hardware Verification: A User's View Summary, presented attendees with possible alternatives to the simulation and validation bottleneck that is common in complex designs. The other half-day workshop titled Core-based Design of Systems on a Chip, presented the emerging Core-based ASIC System Design Methodology. Topics such as core integration, standardization and test were covered. The full day tutorial workshop, DSM Interconnect Modeling and Analysis for Performance and Reliability, addressed delay and signal integrity issues for deep sub-micron design.Designing Real-life Applications Using Synopsys Behavioral Compiler, presented a design methodology that allows systems designers to work at a higher level of abstraction. This workshop used two real-life applications to demonstrate the comprehensive design flow. The third full-day workshop, Design of Integrated Systems including MEMS and ASICs, presented an overview of MicroElectroMechanical Systems (MEMS) design and how the ASIC designer can integrate devices such as sensors and actuators onto system chips.

Keynote Address:

The technical program opened on Monday with the Keynote Speaker, Dr. Raul Camposano, Chief Technical Officer of Synopsys Inc. who presented the keynote address "Design Technology for System On a Chip". Dr. Camposano discussed the design environment that he envisions for deep sub-micron designs and discussed potential problems facing system on a chip (SOC) designers. He also claimed that some of the currently feared problems, namely unmanageable power density, interconnect delay, and signal integrity, would ultimately be shown to be unimportant. A detailed review of his speech has been published in EE Times.

Technical Program:

The technical program began Monday afternoon and continued through Wednesday; having two parallel tracks of technical presentations running each day, except Monday afternoon, which had 3 parallel sessions. There were 12 technical sessions: "Analog and Mixed Signal", "Design for Test", "ASIC Applications", "Low Power", "Novel Devices and Circuits", "ASIC CAD Applications and Algorithms", "ASIC Architectures", "Digital Image and Signal Processing", "Reusable Architectures and Intellectual Property", "Simulation and Modeling for High Level Design", "High Performance Circuits", and "MEMS and Sensors".

Luncheon:

The Luncheon was held on Tuesday. Vic Kulkarni, Head of Avant! Corporation's Library Business Unit (formerly Galax!) spoke on the subject of "Silicon Intellectual Property: The Passport to System-on-a-chip". His talk discussed the relationship between intellectual property and the difficulties presented by the attempting to fully realize system on chip and minimize time to market with new products.

Banquet:

The conference Banquet was held Monday evening. For the Banquet Dr. James Bell, Cornell UniversityAstronomy Department, Center for Radiophysics and Space Research, presented "NASA Mars Rovers & Orbiters: Imaging the Geologic History of the Red Planet". His talk, which included spectacular imagery taken with the Mars Rover and Orbiter, discussed the step-by-step progress of the missions and the scientific evidence gained about the geologic and climactic history of Mars. He also discussed plans and goals for future missions. There is an EE Times article on Dr. Bell's banquet speech.

Panel Discussion:

On Tuesday evening, we presented a panel discussion titled "Intellectual Property (IP) Companies – A Key Industry Megatrend for 2002". It explored technical, marketing, legal, and financial questions about how IP companies are fundamentally redefining ASIC design and manufacturing practices. The panel explored the evolution and future of the ASIC industry and the new opportunities and problems being created by IP companies. The panel consisted of five very knowledgeable IP practitioners with diverse areas of expertise. The panel consisted of Ed Roche from VLSI Technology, George Riley from the law firm O'Melveny & Myers (San Francisco, Calif.), Robert Bowman, of Mint Technology, Raj Gollamudi a financial analyst at Wessels, Arnold & Henderson (Minneapolis), as well as our Luncheon speaker, Vic Kulkarni of Avant! Corporation. The panel discussion was moderated by Nanjunda Shastry, Director of Semiconductor Technology at 3Com Corporation. It was well attended and very informative.

Invited Papers:

There were a number of top quality invited papers. Of those, the two that were singled out for kicking off the Monday afternoon presentations were Substrate Noise in Mixed Signal Circuits: Two Case Studies, by Dave England and James Smith of Intel Corporation and Embedded Core Test Strategy and Built-In Self-Test for Automotive Microcontrollers, by Christopher Ryan of Texas Instruments, Stafford, TX.

Publicity:

Ron Wilson, special editor of semiconductor technology with the EE Times, subsequently wrote three articles about ASIC'98 which appeared in subsequent issues. His articles are titled: "ASIC '98 probes ULSI barriers", "Camposano describes the system-on-a-chip future", and "Mars trek made for creative engineering."

Feedback:

Several conference attendees, and invited speakers praised the technical content of this year's ASIC conference. There were also suggestions for improvements which were carefully noted and will be incorporated into ASIC'99.
If you would like to give us some feedback on how to improve the quality of the conference, or if you would like to be added to our mailing list, please visit our guestbook.

Conference Statistics

The following diagram shows statistics regarding this years conference and comparing it with ASIC'97 and prior years:

The primary ASIC'98 data is as follows: The demographics of the accepted papers are as follows: A total of 157 people from 18 countries all over the world attended the conference.
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