WEDNESDAY, SEPTEMBER 13 - MORNING

Plenary Session
Regency Ballroom AB

7:00 a.m.

Registration

8:10 a.m.

Opening Remarks, Thomas Buechner, General Conference Chair

8:20 a.m.

Technical Program Overview, Jo Dale Carothers, Technical Program Chair

8:30 a.m.

Keynote Address: “Communications Systems on a Chip: Opportunity and Challenges”,
John E. Kelly, III, General Manager, IBM Microelectronics Division

9:30 a.m.

Break

10:00 a.m.

Plenary Talk: Design for signal integrity on SOC, Wolfgang Roethig, NEC

11:00 a.m.

Exhibitor Presentations

11:30 p.m.

Open Lunch

Exhibits Open

WEDNESDAY, SEPTEMBER 13 - AFTERNOON

WP1: IMAGING

Regency Ballroom A

Session Chair: Paul Lee, Eastman Kodak
Session Co-Chair: David England, Intel

1:30 p.m.
WP1.1

Design and Synthesis of Built-in Self-Testable Two-Dimensional Discrete Cosine Transform Circuits, H.B. Kim and D.S. Ha*, Sun Microsystems, Inc., Palo Alto, CA and *Virginia Tech, Blacksburg, VA

1:55 p.m.
WP1.2

Switched-Current Filter Design for Image Processing Systems, A. Handkiewicz, M. Kropidlowski, M. Lukowiak, and M. Bartkowiak, Poznan University of Technology, Poznan, Poland

2:20 p.m.
WP1.3

A Reconfigurable Pipelined IDCT for Low-Energy Video Processing, S. Kim, C.H. Ziesler and M.C. Papaefthymiou, University of Michigan, Ann Arbor; MI

2:45 p.m.
WP1.4

Fast Digital Photon Correlation System with High Dynamic Range, M. Engels, B. Hoppe*, H. Meuth, and R. Peters*, University of Applied Science, Darmstadt, Germany and *ALV - GmbH, Langen, Germany

3:10 p.m.

Break

WP2: SPECIAL SESSION: EMBEDDED DRAM

Regency Ballroom B

Session Chair: Shih-Lien Lu, Intel Corp.
Session Co-Chair:

1:30 p.m.
WP2.1

Overview and Session Summary, Shih-Lien Lu, Oregon State University, Corvallis, OR

1:55 p.m.
WP2.2

Obeying Moore's Law Beyond 0.18 micron, S. Borkar, Intel Corp., Hillsboro, OR

2:20 p.m.
WP2.3

The Ideal SoC Memory: 1T-SRAM, W. Leung, F.-C. Hsu and M.-E. Jones, MoSys Inc., Sunnyvale, CA

2:45 p.m.
WP2.4

An 0.18um Embedded FCRAM ASIC with DRAM Density and SRAM Performance, Y. Okajima, A. Cosoroaba* and H. Kobayashi*, Fujitsu Ltd., Kawasaki, Japan and *Fujitsu Microelectronics, San Jose, CA

3:10 p.m.

Break

WEDNESDAY, SEPTEMBER 13 - AFTERNOON (continued)

WP3: DIGITAL SYSTEMS

Regency Ballroom A

Session Chair: David England, Intel
Session Co-Chair: Sumer Can, Maxim

3:35 p.m.
WP3.1

High-Speed Adder Design Using Time Borrowing and Early Carry Propagation, G. Jung and G. Sobelman, University of Minnesota, Minneapolis, MN

4:00 p.m.
WP3.2

Interpolation-Based Digital Quadrature Frequency Synthesizer, R. Larson and S.-L. Lu, Oregon State University, Corvallis, OR

4:25 p.m.
WP3.3

On-Chip Delta-I Noise in the Power Distribution Networks of High Speed CMOS Integrated Circuits, K.T. Tang and E.G. Friedman, University of Rochester, Rochester, NY

4:50 p.m.
WP3.4

A System-Level Simulation Environment for System-On-Chip Design, T. Schneider, J. Mades, A. Windisch*, M. Glesner, D. Monjau*, and W. Ecker**, Darmstadt University of Technology, Darmstadt, Germany, *Technical University of Chemnitz, Chemnitz, Germany and **Infineon Technologies, Munich, Germany

WP4: WIRELESS AND PORTABLE COMMUNICATIONS

Regency Ballroom B

Session Chair:
Session Co-Chair:

3:35 p.m.
WP4.1

A QAM Modulator for WCDMA Base Station, J. Vankka, L. Sumanen and K. Halonen, Helsinki University of Technology, Espoo, Finland

4:00 p.m.
WP4.2

A DFE Equalizer ASIC chip using the MMA Algorithm, D. Shin, K.H. Park and M.H. Sunwoo, Ajou University, Suwon, Korea

4:25 p.m.
WP4.3

Vector Quantization Processor for Mobile Video Communication, T. Iwahashi, T. Shibayama, M. Hashimoto, K. Kobayashi, and H. Onodera, Kyoto University, Kyoto, Japan

4:50 p.m.
WP4.4

VLSI Implementation of Portable MPEG-4 Audio Decoder, S. Hashimoto, A. Niwa, H. Okuhata, T. Onoye, and I. Shirakawa, Osaka University, Osaka, Japan

5:15 p.m.

Opening Reception

6:30 p.m. to
8:00 p.m.

Panel Discussion: “Moore´s Law and Reality - Perspectives in SoC Design”
Chair:
Shih-Lien Lu, Oregon State University
Panelists:
Shekhar Borkar, Intel Corp.,
Wing Leung, MoSys,
Carl Ashley, IBM Microelectronics,
Wolfgang Roethig, NEC

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