The conference started with a Keynote by Wilf Corrigan, Chairman and CEO of LSI Logic Corporation, followed by an impressive plenary session. Corrigan noted, “The Internet is much more than the primary growth driver for the $140 billion global semiconductor industry.” “Before the Internet, engineers almost made a point of being disconnected,” Corrigan said, “They wouldn't always share information with other engineers. Now everyone has access, and that has a multiplying effect on progress. The Internet is accelerating the rate of technological progress.” Corrigan used the example of the “Star” transistor, circa 1962, to illustrate how far the industry has come in nearly four decades. He said the “Star” cost about $10 per transistor in the early 1960s. Today, $10 will buy a lot more: 1 million transistors. Corrigan added that it's much easier to "evangelize" about single-chip systems than it is to make them a reality. He said a system on a chip must include a processing element, embedded storage and logic, and it must actually “define” the function of the system. Corrigan also noted that “Intellectual property transfers are always much more complicated than initial engineering agreements contemplate.” “The Internet is the primary driver for very large, very complex chips”.

Professor James D. Meindl, the director of the Joseph M. Pettit Microelectronics Research Center and the Pettit Chair Professor of Microelectronics at the Georgia Institute of Technology in Atlanta, Georgia started the plenary session with a talk on gigascale system-on-a-chip.
“Throughout the past four decades, semiconductor technology has advanced at exponential rates in both productivity and performance. The most revealing productivity metric, the number of transistors per chip at a virtually constant chip cost, indicates an improvement of over eight orders of magnitude. The single most revealing performance metric, the signal energy transfer per binary switching transition, reveals an enhancement of over six orders of magnitude. In the real world, such exponential advances do not continue.”
He presented a systematic assessment of early XXI century opportunities and persistent limits on a gigascale system-on-a-chip (GSoC). The central thesis of this assessment was that a hierarchy of limits will govern opportunities for a GSoC. He presented five levels of this hierarchy, as fundamental, material, device, circuit and system.

Dr. Yervant Zorian, the Chief Technology Advisor of LogicVision Inc., presented testing and debugging challenges in the complex domain of system-on-chip. Conventional test methods are inadequate and costly for SoC complexity and very deep submicron (VDSM) design. He presented an approach of embedded test which enables customers to produce higher-quality products in less time. The use of embedded test raises margins and significantly reduces the time required for system verification, test and debug. He addressed core-, chip- and board-level test and debug issues, test technologies, SOC integration /test issues - making SOC a reality, and the importance of embedded test and front-end (time to money, quality and cost).

Professor Kensall D. Wise, Director, Center for Integrated Microsystems, University of Michigan, then presented the newly impacting technologies in SoC, namely integrated microsystems. He presented the need for merging microelectro-mechanical systems (MEMS), micropower integrated circuits, and, in some cases, wireless communications for a wide variety of applications. Since the start of MEMS activity in the late 1960s, pressure sensor figures of merit have improved by factors of more than 40,000, now offering sub-mTorr resolution and dynamic ranges reaching five orders of magnitude. Silicon accelerometers range from micro-g to kilo-g levels while integrated gyros have reached tactical-grade and are driving toward inertial-grade performance. Scanning force microscopes have revolutionized surface science and tactile imagers may soon make electronic fingerprint readers possible for banking and security applications. In addition, many integrated transducers for optical, thermal, magnetic, and chemical parameters are emerging, including micromirror-based projection displays, IR/thermal imagers, inkjet print heads, read heads for ultra-high-density mass storage, and conductivity/calorimetric chemical sensors. Using embedded microprocessors, modular microsystems employing self-testing and digital compensa-tion promise to achieve levels of reliability and accuracy previously impossible at low cost. He reviewed the state-of-the-art in this area and some of the challenges for the coming decade.

The technical sessions addressed key issues in the design of SoCs, such as IP, design reuse, SOI, Cu interconnects and presented new methods, ideas, solutions and paradigms for System-on-Chip design and verification. Eighteen technical paper sessions with 77 technical paper presentations from 19 countries all over the world made this conference a truly international event. On the last day of the conference, six carefully selected half-day tutorials offered in-depth coverage of the most important areas in ASIC and SOC design and verification, such as interconnect modeling, signal integrity, low power design, hardware/software codesign and design reuse.

At the banquet held on 16th September, Professor Leon Chua, Director of Nonlinear Electronics Laboratory, University of California, Berkeley gave an inspiring talk on Cellular Neural Networks and how it could provide an alternate approach to designing complex systems.

Luncheon speaker, Dr. Juri Matisoo, Vice President of Technology, Silicon Industry Association could not arrive due to the hurricane. His talk was presented by Ram Krishnamurthy of Intel. This talk outlined the various challenges faced by the silicon industry to reach the integration levels required for SoC designs and provided some insights to the international semiconductor technology roadmap and the need for the support of the research efforts.